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LT1995 30MHz, 1000V/s Gain Selectable Amplifier
FEATURES

DESCRIPTIO

Internal Gain Setting Resistors Pin Configurable as a Difference Amplifier, Inverting and Noninverting Amplifier Difference Amplifier: Gain Range 1 to 7 CMRR > 65dB Noninverting Amplifier: Gain Range 1 to 8 Inverting Amplifier: Gain Range -1 to -7 Gain Error: <0.2% Slew Rate: 1000V/s Bandwidth: 30MHz (Gain = 1) Op Amp Input Offset Voltage: 2.5mV Max Quiescent Current: 9mA Max Wide Supply Range: 2.5V to 15V Available in 10-Lead MSOP and 10-Lead (3mm x 3mm) DFN Packages
The LT(R)1995 is a high speed, high slew rate, gain selectable amplifier with excellent DC performance. Gains from -7 to 8 with a gain accuracy of 0.2% can be achieved using no external components. The device is particularly well suited for use as a difference amplifier, where the excellent resistor matching results in a typical common mode rejection ratio of 70dB or more. The amplifier is a single gain stage design similar to the LT1363 and features superb slewing and settling characteristics. Input offset of the internal operational amplifier is less than 2.5mV and the slew rate is 1000V/s. The output can drive a 150 load to 2.5V on 5V supplies, making it useful in cable driver applications. The resistors have excellent matching, 0.2% maximum at room temperature and 0.3% from -40C to 85C. The temperature coefficient of the resistors is typically -30ppm/C. The resistors are extremely linear with voltage, resulting in a gain nonlinearity of 10ppm. The LT1995 is fully specified at 2.5V, 5V and 15V supplies and from -40C to 85C. The device is available in space saving 10-lead MSOP and 10-Lead (3mm x 3mm) DFN packages. For a micropower precision amplifier with precision resistors, see the LT1991 and LT1996.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIO S

Instrumentation Amplifier Current Sense Amplifier Video Difference Amplifier Automatic Test Equipment
TYPICAL APPLICATIO
M1 M2 M4 1k 2k
High Slew Rate Differential Gain of 1
15V 4k OUT
Large-Signal Transient (G = 1)
+
2k 1k
P1 P2 P4
+
INPUT RANGE -15V TO 15V
4k
-
-
4k
LT1995 4k
1995 TA01b
REF -15V
1995 TA01a
U
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LT1995
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V-) .............................. 36V Input Current (Note 2) ....................................... 10mA Output Short-Circuit Duration (Note 3) ........... Indefinite Operating Temperature Range (Note 4) .. - 40C to 85C Specified Temperature Range (Note 5) ... - 40C to 85C Storage Temperature Range MS Package .................................... - 65C to 150C DD Package ..................................... - 65C to 125C
PACKAGE/ORDER INFORMATION
TOP VIEW P1 P2 P4 VS- REF 1 2 4 5
-+
ORDER PART NUMBER
10 M1 9 M2 8 M4 7 VS+ 6 OUT
TOP VIEW
DD PACKAGE 10-LEAD (3mm x 3mm) PLASTIC DFN
TJMAX = 125C, JA = 160C/W (NOTE 6) EXPOSED PAD INTERNALLY CONNECTED TO VS- PCB CONNECTION OPTIONAL
DD PART MARKING* LBJF
MS PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 150C, JA = 160C/W (NOTE 6)
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grades are identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
Difference Amplifier Configuration. TA = 25C, VREF = VCM = 0V and unused gain pins are unconnected, unless otherwise noted.
SYMBOL PARAMETER GE Gain Error CONDITIONS VOUT = 12V, RL = 1k, G = 1 VOUT = 12V, RL = 1k, G = 2 VOUT = 12V, RL = 1k, G = 4 VOUT = 5V, RL = 150, G = 1 VOUT = 2.5V, RL = 500, G = 1 VOUT = 2.5V, RL = 150, G = 1 VOUT = 12V, RL = 1k, G = 1 G = 1 (MS10) G = 1 (DD10) G = 2 (MS10) G = 2 (DD10) G = 4 (MS10) G = 4 (DD10) G = 1 (MS10) G = 1 (DD10) G = 1 (MS10) G = 1 (DD10) VSUPPLY 15V 15V 15V 15V 5V 5V 15V 15V 15V 15V 15V 15V 15V 5V 5V 2.5V 2.5V MIN TYP 0.05 0.05 0.05 0.05 0.05 0.05 10 1 1.5 0.7 1.2 0.6 0.9 1 1.4 1 1.3 5 9 4 6.8 3.75 5.6 5 9 5 9 MAX 0.2 0.2 0.2 0.25 0.2 0.25 UNITS % % % % % % ppm mV mV mV mV mV mV mV mV mV mV
GNL VOS
Gain Nonlinearity Input Offset Voltage Referred to Input (Note 7)
2
-+
3
LT1995CDD LT1995IDD
U
U
W
WW
U
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(Note 1)
Maximum Junction Temperature MS Package ..................................................... 150C DD Package ..................................................... 125C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER
P1 P2 P4 VS- REF 1 2 3 4 5 10 9 8 7 6 M1 M2 M4 VS+ OUT
LT1995CMS LT1995IMS MS PART MARKING* LTBJD
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LT1995
ELECTRICAL CHARACTERISTICS
Difference Amplifier Configuration. TA = 25C, VREF = VCM = 0V and unused gain pins are unconnected, unless otherwise noted.
SYMBOL PARAMETER VOS_OA en Op Amp Input Offset Voltage (Note 10) Input Noise Voltage CONDITIONS G = 1 (MS10) G = 1 (DD10) G = 1, f = 10kHz G = 2, f = 10kHz G = 4, f = 10kHz VSUPPLY 2.5V, 5V, 15V 2.5V, 5V, 15V 2.5V to 15V 2.5V to 15V 2.5V to 15V 15V 15V G=1 15V 5V 2.5V 15V 15V 15V 5V 2.5V 15V 15V 5V 2.5V 15V 15V 5V 15V 5V 15V 15V 5V 2.5V 15V 5V 15V 5V 15V 5V 15V 5V 15V 15V 15V 15V 5V 15 5 1 65 71 75 65 61 78 13.5 13 3.5 1.3 70 750 MIN TYP 0.5 0.75 27 18 14 4 2.5 15.5 5.5 1.5 79 84 87 73 68 87 14 13.5 4 2 120 1000 450 16 24 -81 32 25 21 10 15 30 30 9 11 100 110 0.06 0.15 1.5 7.1 6.7 9.0 8.5 MAX 2.5 4.5 UNITS mV mV nV/Hz nV/Hz nV/Hz k pF V V V dB dB dB dB dB dB V V V V mA V/s V/s MHz MHz dB MHz MHz MHz ns ns % % ns ns ns ns % Deg mA mA
RIN CIN
Common Mode Input Resistance VCM = 15V, G = 1 Input Capacitance Input Voltage Range
CMRR
Common Mode Rejection Ratio Referred to Input
G = 1, VCM = 15V G = 2, VCM = 15V G = 4, VCM = 15V G = 1, VCM = 5V G = 1, VCM = 1V P1 = M1 = 0V, G = 1, VS = 2.5V to 15V RL = 1k RL = 500 RL = 500 RL = 500 G=1 G = -2, VOUT = 12V, P2 = 0V Measured at VOUT = 10V G = -2, VOUT = 3.5V, P2 = 0V Measured at VOUT = 2V 10V Peak, G = -2 (Note 8) 3V Peak, G = -2 (Note 8) G = 1, f = 1MHz, RL = 1k, VOUT = 2VP-P G=1
PSRR VOUT
Power Supply Rejection Ratio Output Voltage Swing
ISC SR
Short-Circuit Current Slew Rate
FPBW HD
Full Power Bandwidth Total Harmonic Distortion -3dB Bandwidth
tr, tf OS tpd ts G ROUT IS
Rise Time, Fall Time Overshoot Propagation Delay Settling Time Differential Gain Differential Phase Output Resistance Supply Current
10% to 90%, 0.1V, G = 1 0.1V, G = 1, CL = 10pF 50% VIN to 50% VOUT, 0.1V, G = 1 10V Step, 0.1%, G = 1 5V Step, 0.1%, G = 1 G = 2, RL = 150 G = 2, RL = 150 f = 1MHz, G = 1 G=1
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ELECTRICAL CHARACTERISTICS
SYMBOL GE PARAMETER Gain Error CONDITIONS
The denotes the specifications which apply over the 0C TA 70C. Difference Amplifier Configuration. VREF = VCM = 0V and unused gain pins are unconnected, unless otherwise noted.
VSUPPLY 15V 15V 15V 5V 5V 15V 15V 15V 15V 15V 15V 5V 5V 2.5V 2.5V 15V 15V 2.5V, 5V, 15V 2.5V, 5V, 15V 15V 5V 2.5V 15V 15V 15V 5V 2.5V 15V 15V 5V 2.5V 15V 15V 15V 5V 15V 15V 15V 5V 5V

MIN
TYP 0.05 0.05 0.05 0.05 0.05 1.1 1.5 0.8 1.2 0.7 0.9 1 1.4 1 1.3 10 10 0.55 0.75
MAX 0.25 0.25 0.25 0.25 0.35 6.5 11.5 5.5 9 5 7.5 6.5 11.5 6.5 11.5 26 35 3.25 5.75
UNITS % % % % % mV mV mV mV mV mV mV mV mV mV V/C V/C mV mV V V V dB dB dB dB dB dB V V V V mA V/s
VOUT = 12V, RL = 1k, G = 1 VOUT = 12V, RL = 1k, G = 2 VOUT = 12V, RL = 1k, G = 4 VOUT = 2.5V, RL = 500, G = 1 VOUT = 2.5V, RL = 150, G = 1 G = 1 (MS10) G = 1 (DD10) G = 2 (MS10) G = 2 (DD10) G = 4 (MS10) G = 4 (DD10) G = 1 (MS10) G = 1 (DD10) G = 1 (MS10) G = 1 (DD10) G = 1 (MS10) G = 1 (DD10) G = 1 (MS10) G = 1 (DD10) G=1
VOS
Input Offset Voltage Referred to Input (Note 7)
VOS TC VOS_OA
Input Offset Voltage Drift Referred to Input (Note 9) Op Amp Input Offset Voltage (Note 10) Input Voltage Range
15 5 1 63 69 73 62 59 76 13.1 12.6 3.4 1.2 55 600
15.5 5.5 1.5 77 83 86 72 66 86 14 13.5 4 2 115 900 7.9 7.4 0.05 0.05 0.05 0.05 0.05 10.5 9.9 0.3 0.35 0.35 0.3 0.5
CMRR
Common Mode Rejection Ratio Referred to Input
VCM = 15V, G = 1 VCM = 15V, G = 2 VCM = 15V, G = 4 VCM = 5V, G = 1 VCM = 1V, G = 1 P1 = M1 = 0V, G = 1, VS = 2.5V to 15V RL = 1k RL = 500 RL = 500 RL = 500 G=1 G = -2, VOUT = 12V, P2 = 0V Measured at VOUT = 10V G=1 VOUT = 12V, RL = 1k, G = 1 VOUT = 12V, RL = 1k, G = 2 VOUT = 12V, RL = 1k, G = 4 VOUT = 2.5V, RL = 500, G = 1 VOUT = 2.5V RL = 150, G = 1
PSRR VOUT
Power Supply Rejection Ratio Output Voltage Swing
ISC SR IS GE
Short-Circuit Current Slew Rate Supply Current Gain Error
mA mA % % % % %
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LT1995
ELECTRICAL CHARACTERISTICS
SYMBOL VOS PARAMETER Input Offset Voltage Referred to Input (Note 7) CONDITIONS G = 1 (MS10) G = 1 (DD10) G = 2 (MS10) G = 2 (DD10) G = 4 (MS10) G = 4 (DD10) G = 1 (MS10) G = 1 (DD10) G = 1 (MS10) G = 1 (DD10) G = 1 (MS10) G = 1 (DD10) G = 1 (MS10) G = 1 (DD10) G=1
The denotes the specifications which apply over the -40C TA 85C. Difference Amplifier Configuration. VREF = VCM = 0V and unused gain pins are unconnected, unless otherwise noted.
VSUPPLY 15V 15V 15V 15V 15V 15V 5V 5V 2.5V 2.5V 15V 15V 2.5V, 5V, 15V 2.5V, 5V, 15V 15V 5V 2.5V 15V 15V 15V 5V 2.5V 15V 15V 5V 2.5V 15V 15V 15V 5V

MIN
TYP 1.2 1.6 0.9 1.2 0.7 0.9 1.1 1.4 1.1 1.5 10 10 0.6 0.8
MAX 7.5 13 6 10 5.5 8.5 7.5 13 7.5 13 26 35 3.75 6.5
UNITS mV mV mV mV mV mV mV mV mV mV V/C V/C mV mV V V V dB dB dB dB dB dB V V V V mA V/s
VOS TC VOS_OA
Input Offset Voltage Drift Referred to Input (Note 9) Op Amp Input Offset Voltage (Note 10) Input Voltage Range
15 5 1 62 68 72 61 57 74 13 12.5 3.3 1.1 50 550
15.5 5.5 1.5 77 83 86 72 66 86 14 13.5 4 2 105 900 8.0 7.6 11.0 10.4
CMRR
Common Mode Rejection Ratio VCM = 15V, G = 1 Referred to Input VCM = 15V, G = 2 VCM = 15V, G = 4 VCM = 5V, G = 1 VCM = 1V, G = 1 Power Supply Rejection Ratio Output Voltage Swing P1 = M1 = 0V, G = 1, VS = 2.5V to 15V RL = 1k RL = 500 RL = 500 RL = 500 G=1 G = -2, VOUT = 12V, P2 = 0V Measured at VOUT = 10V G=1
PSRR VOUT
ISC SR IS
Short-Circuit Current Slew Rate Supply Current
mA mA
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The inputs are protected by diodes connected to VS+ and VS-. If an input goes beyond the supply range, the input current should be limited to 10mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. Note 4: The LT1995C and LT1995I are guaranteed functional over the operating temperature range of -40C to 85C. Note 5: The LT1995C is guaranteed to meet specified performance from 0C to 70C. The LT1995C is designed, characterized and expected to meet specified performance from -40C to 85C but is not tested or QA sampled at these temperatures. The LT1995I is guaranteed to meet specified performance from -40C to 85C.
Note 6: Thermal resistance (JA) varies with the amount of PC board metal connected to the leads. The specified values are for short traces connected to the leads. If desired, the thermal resistance can be reduced slightly in the MS package to about 130C/W by connecting the used leads to a larger metal area. A substantial reduction in thermal resistance down to about 50C/W can be achieved by connecting the Exposed Pad on the bottom of the DD package to a large PC board metal area which is either open-circuited or connected to VS-. Note 7: Input offset voltage is pulse tested and is exclusive of warm-up drift. VOS and VOS TC refer to the input offset of the difference amplifier configuration. The equivalent input offset of the internal op amp can be calculated from VOS_OA = VOS * G/(G +1). Note 8: Full Power bandwidth is calculated from the slew rate measurement: FPBW = SR/2VP. Note 9: This parameter is not 100% tested. Note 10: The input offset of the internal op amp is calculated from the input offset voltage: VOS_OA = VOS * G/(G +1).
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LT1995 TYPICAL PERFOR A CE CHARACTERISTICS (Difference Amplifier Configuration)
VOS Distribution
25 VS = 15V VCM = 0V G=1 20 MS PACKAGE 15
10 TA = 125C TA = 25C 6 TA = -55C 4
8
INPUT VOLTAGE NOISE (nV/Hz)
NUMBER OF UNITS (%)
SUPPLY CURRENT (mA)
10
5
0 1.5 2.5 -3.5 -2.5 -1.5 -0.5 0.5 INPUT OFFSET VOLTAGE (mV)
Change in Gain Error vs Resistive Load
0.05 0.04
CHANGE IN GAIN ERROR (%)
0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.05 0 1 2 G=2 G=4
VS = 15V TA = 25C VOUT = 12V
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
G=7
G=1
345678 RESISTIVE LOAD (k)
Warm-Up Drift vs Time
300
CHANGE IN INPUT OFFSET VOLTAGE (V)
OUTPUT SHORT-CIRCUIT CURRENT (mA)
250 200 150 100 50 0 0
VS = 15V TA = 25C MS PACKAGE
OUTPUT IMPEDACNE ()
G=1 G=7
1 2 3 4 TIME AFTER POWER ON (MINUTES)
6
UW
1995 G01
Supply Current vs Supply Voltage and Temperature
1000
Input Noise Spectral Density
VS = 15V TA = 25C
100 G=1 G=2
10
G=7 G=4
2
3.5
0
0
10 5 15 SUPPLY VOLTAGE (V)
20
1995 G02
1 0.01
0.1
1 10 FREQUENCY (kHz)
100
1995 G03
Output Voltage Swing vs Supply Voltage
TA = 25C RL = 1k RL = 500 V+ -0.5 -1.0 -1.5
Output Voltage Swing vs Load Current
VS = 5V 25C -40C 3.0 2.5 2.0 1.5 1.0 0.5 -40C 85C 25C 85C V+ -0.5 -1.0 -1.5 -2.0
1.5 1.0 0.5
RL = 500 RL = 1k
9
10
V-
0
10 5 15 SUPPLY VOLTAGE (V)
20
1995 G05
V- -50
-25 0 25 OUTPUT CURRENT (mA)
50
1995 G06
1995 G04
Output Short-Circuit Current vs Temperature
120 100
100
Output Impedance vs Frequency
1000 VS = 15V TA = 25C
VS = 5V
80 SOURCE 60 40 20 0 -50 -25 SINK
G=7 10 G=1 1
5
50 25 75 0 TEMPERATURE (C)
100
125
0.1 10k
100k
1M 10M FREQUENCY (Hz)
100M
1995 G09
1995 G07
1995 G08
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LT1995 TYPICAL PERFOR A CE CHARACTERISTICS (Difference Amplifier Configuration)
Gain vs Frequency
20 18 G=7 16 14 G=4 12 10 8 G=2 6 4 2 G=1 0 -2 -4 V = 15V S -6 T = 25C A -8 RL = 1k -10 100k 10k 10
OUTPUT STEP (V)
OUTPUT STEP (V)
GAIN (dB)
1M 10M FREQUENCY (Hz)
Settling Time vs Gain (Non-Inverting)
140 120
40 35
-3dB BANDWIDTH (MHz)
SETTLING TIME (ns)
100 80 60 40 VS = 15V TA = 25C 20 VOUT = 10V RL = 1k 0.1% SETTLING 0 1 3 2
30
-3dB BANDWIDTH (MHz)
5 4 GAIN (V/V)
6
Frequency Response vs Supply Voltage (G = 1, G = -1)
10 TA = 25C 8 RL = 1k
15
VOLTAGE MAGNITUDE (dB)
6 4 2.5V 15V 5V
10 5 0 -5 -10 -15
COMMON MODE REJECTION RATIO (dB)
GAIN (dB)
2 0 -2 -4 -6 -8 -10 100k 1M 10M FREQUENCY (Hz)
UW
1995 G10
Settling Time vs Output Step (Non-Inverting)
VS = 15V 8 TA = 25C RL = 1k 6 G=1 4 2 0 -2 -4 -6 -8 100M -10 0 20 40 60 80 100 120 140 160 180 SETTLING TIME (ns)
1995 G11
Settling Time vs Output Step (Inverting)
10 VS = 15V 8 TA = 25C RL = 1k 6 G = -1 4 2 0 -2 -4 -6 -8 -10 0 20 40 60 80 100 120 140 160 SETTLING TIME (ns)
1995 G12
10mV
1mV
10mV
1mV
10mV
1mV
10mV
1mV
-3dB Bandwidth and Overshoot vs Supply Voltage
TA = 25C G = -1 -3dB BANDWIDTH 35 30 25 20
-3dB Bandwidth and Overshoot vs Temperature
G = -1 VS = 15V VS = 5V
OVERSHOOT (%)
OVERSHOOT (%)
25 20 OVERSHOOT CL = 15pF 41 42
-3dB BANDWIDTH
50 OVERSHOOT CL = 15pF VS = 15V VS = 5V 45 40 35 125
7
8
1995 G13
0
2
4
8 10 12 14 6 SUPPLY VOLTAGE (V)
16
18
40
-50 -25
50 25 75 0 TEMPERATURE (C)
100
1995 G14
1995 G15
Frequency Response vs Capacitive Load
20 VS = 15V TA = 25C RL = G = -1
100
Common Mode Rejection Ratio vs Frequency
C = 200pF
VS = 15V 90 TA = 25C G=1 80 70 60 50 40 30 20 10 0 1k 10k 1M 100k FREQUENCY (Hz) 10M 100M
1995 G18
C = 100pF C = 50pF
C = 0pF
100M
1995 G16
1
10 FREQUENCY (MHz)
100
1995 G17
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LT1995 TYPICAL PERFOR A CE CHARACTERISTICS (Difference Amplifier Configuration)
Power Supply Rejection Ratio vs Frequency
90
POWER SUPPLY REJECTION RATIO (dB)
80 70 60 50 40 30 20 10 0 -10 1k 10k 1M 100k FREQUENCY (Hz) -PSRR +PSRR
SLEW RATE (V/s)
SLEW RATE (V/s)
Slew Rate vs Input Level
1400
TOTAL HARMONIC DISTORTION (%)
TA = 25C V = 15V 1200 GS= -1 1000 800 600 400 200 0 0 2 4 6 8 10 12 14 16 18 20 INPUT LEVEL (VP-P)
1995 G22
OUTPUT VOLTAGE (VP-P)
SLEW RATE (V/s)
Undistorted Output Swing vs Frequency (5V)
10 VS = 5V 9 TA = 25C HD <2% 8 DISTORTION (dBc) 7 6 5 4 3 2 1 0 0.1 1 FREQUENCY (MHz) 10
1995 G25
OUTPUT VOLTAGE (VP-P)
DIFFERENTIAL PHASE (DEG)
8
UW
VS = 15V TA = 25C G=1 10M
1995 G19
Slew Rate vs Supply Voltage
TA = 25C 1400 G = -1 + VOUT = VS - VS- - 3VP-P 1200 1000 800 600 400 200 100M 0 0 5 10 15
1995 G20
Slew Rate vs Temperature
1800 1600 1400 1200 1000 800 600 400 200 0 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 VS = 5V VOUT = 7VP-P VS = 15V VOUT = 27VP-P G = -2
1600
SUPPLY VOLTAGE (V)
1995 G21
Total Harmonic Distortion vs Frequency
0.01 TA = 25C Vo = 3VRMS RL = 500
Undistorted Output Swing vs Frequency (15V)
30 25 G=1 20 15 10 5 VS = 15V TA = 25C HD <2% 0 0.1 G = -1
0.001 G=1 G = -1
0.0001 0.01
0.1
1 10 FREQUENCY (kHz)
100
1995 G23
1 FREQUENCY (MHz)
10
1995 G24
2nd and 3rd Harmonic Distortion vs Frequency
-40 VS = 15V VOUT = 2VP-P -50 RL = 500 G=2
Differential Gain and Phase vs Supply Voltage
TA = 25C RL = 150 G=2 0.5 0.4 0.3 0.2 1.0 0.8 0.6 0.4 0.2 0 0 5 10 15 20 SUPPLY VOLTAGE (V) 25 30
1995 G27
DIFFERENTIAL GAIN (%)
-60 -70 2ND HARMONIC -80 -90
DIFFERENTIAL GAIN
G=1
0.1 0
G = -1
3RD HARMONIC 0.1 1 FREQUENCY (MHz) 10
1995 G26
DIFFERENTIAL PHASE
-100
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LT1995 TYPICAL PERFOR A CE CHARACTERISTICS (Difference Amplifier Configuration)
Capacitive Load Handling
100 VS = 15V 90 TA = 25C RL = 80 70 60 50 40 30 20 10 0 10pF 100pF 1000pF 0.01F 0.1F CAPACITIVE LOAD 1F
1995 G28
OVERSHOOT (%)
OVERSHOOT (%)
G=1
Small-Signal Transient (G = 1)
VS = 15V RL = 1k
100ns/DIV
1995 G30
Large-Signal Transient (G = 1)
VS = 15V RL = 1k
100ns/DIV
1995 G33
UW
Capacitive Load Handling
100 VS = 5V 90 TA = 25C RL = 80 G=1 70 60 50 40 30 20 10 0 10pF 100pF 1000pF 0.01F 0.1F CAPACITIVE LOAD 1F
1995 G29
G=2
G=4
G=2
G=4
G=7
G=7
Small-Signal Transient (G = -1)
Small-Signal Transient (Noninverting, G = 1, CL = 100pF)
VS = 15V RL = 1k
100ns/DIV
1995 G31
VS = 15V RL = 1k
100ns/DIV
1995 G32
Large-Signal Transient (G = -1)
Large-Signal Transient (Noninverting, G = 1, CL = 100pF)
VS = 15V RL = 1k
100ns/DIV
1995 G34
VS = 15V RL = 1k
100ns/DIV
1995 G35
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LT1995
PI FU CTIO S (Difference Amplifier Configuration)
P1 (Pin 1): Noninverting Gain-of-1 Input. Connects a 4k internal resistor to the op amp's noninverting input. P2 (Pin 2): Noninverting Gain-of-2 Input. Connects a 2k internal resistor to the op amp's noninverting input. P4 (Pin 3): Noninverting Gain-of-4 Input. Connects a 1k internal resistor to the op amp's noninverting input. VS- (Pin 4): Negative Supply Voltage. REF (Pin 5): Reference Voltage. Sets the output level when the difference between the inputs is zero. Connects a 4k internal resistor to the op amp's non inverting input. OUT (Pin 6): Output Voltage. VOUT = VREF + 1 * (VP1 - VM1) + 2 * (VP2 - VM2) + 4 * (VP4 - VM4). VS+ (Pin 7): Positive Supply Voltage. M4 (Pin 8): Inverting Gain-of-4 Input. Connects a 1k internal resistor to the op amp's inverting input. M2 (Pin 9): Inverting Gain-of-2 Input. Connects a 2k internal resistor to the op amp's inverting input. M1 (Pin 10): Inverting Gain-of-1 Input. Connects a 4k internal resistor to the op amp's inverting input.
10
U
U
U
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LT1995
BLOCK DIAGRA
APPLICATIO S I FOR ATIO
Configuration Flexibility
The LT1995 combines a high speed precision operational amplifier with eight ratio-matched on-chip resistors. The resistor configuration and pinout of the device is shown in the Block Diagram. The topology is extremely versatile and provides for simple realizations of most classic functional configurations including difference amplifiers, inverting gain stages, noninverting gain stages (including Hi-Z input buffers) and summing amplifiers. The LT1995 delivers load currents of at least 30mA, making it ideal for cable driving applications as well. The input voltage range depends on gain and configuration. ESD diodes will clamp any input voltage that exceeds the supply potentials by more than several tenths of a volt; and the internal op amp input ports must remain at least 1.75V within the rails to assure normal operation of the part. The output will swing to within one and a half volts of
U
W
W
VS+ 7 1 P1 RP1 = 4k 0.5pF RFB = 4k 0.3pF REF 5 2 P2 RP2 = 2k 3 P4 RP4 = 1k
+ -
8
M4
RM4 = 1k
9
M2
RM2 = 2k 0.5pF 0.3pF
10
M1
RM1 = 4k
RFB = 4k
OUT
6
VS-
4
1995 BD
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the rails, which in low supply voltage and high gain configurations will create a limitation on the usable input range. It should be noted that while the internal op amp can withstand transient differential input voltages of up to 10V without damage, this does generate large supply current increases (tens of mA) as required for high slew rates. If the device is used with sustained differential input across the internal op amp (such as when the output is clipping), the average supply current will increase, excessive power dissipation will result, and the part may be damaged (i.e., the LT1995 is not recommended for use in comparator applications or with the output clipped). Difference Amplifier The LT1995 can be connected as a classic difference amplifier with an output function given by: VOUT = G * (VIN+ - VIN-) + VREF
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LT1995
APPLICATIO S I FOR ATIO
As shown in Figure 1, the options for fixed gain G include: 1, 1.33, 1.67, 2, 3, 4, 5, 6 and 7, all achieved by pinstrapping alone. With split-supply applications where the output is to be ground referenced, the VREF input is simply tied to ground. The input common mode voltage is rejected by the high CMRR of the part within the usable input range. Inverting Gain Amplifier The LT1995 can be connected as an inverting gain amplifier with an output function given by: VOUT = -(G * VIN-) + VREF As shown in Figure 1, the options for fixed gain G include: 1, 1.33, 1.67, 2, 3, 4, 5, 6 and 7, all achieved by pin strapping alone. The VIN+ connection used in the difference amp configuration is simply tied to ground (or a low impedance potential equal to the input signal bias to create an input "virtual ground"). With split-supply applications where the output is to be ground referenced, the VREF input is simply tied to ground as well. Noninverting Gain Buffer Amplifier The LT1995 can be connected as a high input impedance noninverting gain buffer amplifier with an output function given by: VOUT = G * VIN As shown in Figure 2, the options for fixed gain G include: 1, 1.14, 1.2, 1.33, 1.4, 1.6, 2, 2.33, 2.66, 3, 4, 5, 6, 7 and 8, all achieved by pin strapping alone. With single supply applications, the grounded M input pins may be tied to a low impedance potential equal to the input signal bias to create a "virtual ground" for both the input and output signals. While there is no input attenuation from VIN to the internal noninverting op amp port in these configurations,
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the P connections vary to minimize offset by providing balanced input resistances to the internal op amp. Noninverting Gain Amplifier Input Attenuation The LT1995 can also be connected as a noninverting gain amplifier having an input attenuation network to provide a wide range of additional noninverting gain options. In combination with the feedback configurations for gains of G shown in Figure 2 (connections to the M inputs), the P and REF inputs may be connected to form several resistor divider attenuation ratios A, so that a compound output function is given by: VOUT = A * G * VIN As shown in Figure 3, the options for fixed attenuation A include 0.875, 0.857, 0.833, 0.8, 0.75, 0.714, 0.667, 0.625 and 0.571, all achieved by pin strapping alone. With just the attenuation configurations of Figure 3 and the feedback configurations of Figure 2, seventy-three unique composite gains in the range of 1 to 8 are available (many options for gain below unity also exist). Figure 3 does not include the additional pin-strap configurations offering A values of 0.5, 0.429, 0.375, 0.333, 0.286, 0.25, 0.2, 0.167, 0.143 and 0.125, as these values tend to compromise the low noise performance of the part and don't generally contribute many more unique gain options. It should be noted that with these configurations some degree of imbalance will generally exist between the effective resistances RP and RM seen by the internal op amp input ports, noninverting and inverting, respectively. Depending on the specific combination of A and G, the following DC offset error due to op amp input bias current (IB) should be anticipated: The IB of the internal op amp is typically 0.6A and is prepackage tested to a limit of 2A. Additional output-referred offset = IB * (RP - RM) * G. In some configurations, this could be as much as 1.7mV * G
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LT1995
APPLICATIO S I FOR ATIO
8 9 VIN- VIN+ 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V VREF G = 1.00 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V G = 2.00 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V G = 5.00 REF 5 VREF 6 VOUT 7 VIN- REF 5 VREF 6 VOUT VIN+ 7 VIN- REF 5 VREF 6 VOUT 7 VIN-
VIN+
8 VIN- 9 10 1 VIN+ 2 3
VIN-
8 9 10 1 2
VIN+
3
VIN+
Figure 1. Difference (and Inverting) Amplifier Configurations
Table 1. Pin Use, Input Range, Input Resistance, Bandwidth in Difference Amplifier Configuration GAIN Use of P1/M1 Use of P2/M2 Use of P4/M4 Positive Input Range: VREF = 0V, VS = 15V Positive Input Range: VREF = 0V, VS = 5V Positive Input Range: VREF = 0V, VS = 2.5V Positive Input Resistance Minus Input Resistance Ref Input Resistance Input Common Mode Resistance, VREF = 0V Input Differential Mode Resistance, VREF = 0V -3dB Bandwidth 1 VIN Open Open 15V 5V 1.5V 8k 4k 8k 4k 8k 32MHz 2 Open VIN Open 15V 4.88V 1.13V 6k 2k 6k 3k 4k 27MHz 3 VIN VIN Open 15V 4.33V 1V 5.33k 1.33k 5.33k 2.67k 2.67k 27MHz 4 Open Open VIN 15V 4.06V 0.94V 5k 1k 5k 2.5k 2k 23MHz 5 VIN Open VIN 15V 3.9V 0.9V 4.8k 800 4.8k 2.4k 1.6k 18MHz 6 Open VIN VIN 15V 3.79V 0.88V 4.67k 667 4.67k 2.33k 1.33k 16MHz 7 VIN VIN VIN 15V 3.71V 0.86V 4.57k 571 4.57k 2.29k 1.14k 15MHz
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8 9 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V VREF G = 1.33 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V G = 3.00 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V G = 6.00 REF 5 VREF 6 VOUT 7 VIN- REF 5 VREF 6 VOUT 7 VIN- G = 1.67 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V G = 4.00 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V G = 7.00 REF 5 VREF 6 VOUT
1995 F01
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7 6 REF 5
VIN-
8 9 10
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V REF 5 6 VOUT 7
VOUT
1 2 VIN+ 3
8 9 10 1 2 3
8 9 10 1 2
7 6 REF 5 VREF
VOUT
VIN+
3
8 9 10 1 2 3
8 9 10 1 2
7
VIN+
3
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LT1995
APPLICATIO S I FOR ATIO
8 9 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 1.00 REF 5 6 VOUT 7
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 1.33 REF 5 6 VOUT 7
VIN
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 2.00 REF 5 6 VOUT 7
VIN
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 3.00 REF 5 6 VOUT 7
VIN
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 6.00 REF 5 6 VOUT 7
VIN
Figure 2. Noninverting Buffer Amplifier Configurations (Hi-Z Input)
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8 9 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 1.14 VIN G = 1.20 REF 5 6 VOUT 7 8 9 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V REF 5 6 VOUT 7 8 9 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 1.40 REF 5 6 VOUT 7 8 9 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V
1995 F02
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7 6 REF 5
VOUT
G = 1.60
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 2.33 REF 5 6 VOUT 7
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V G = 2.66 REF 5 6 VOUT 7
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 4.00 REF 5 6 VOUT 7
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V G = 5.00 REF 5 6 VOUT 7
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN G = 7.00 REF 5 6 VOUT 7
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V
1995 F02b
7 6 REF 5
VOUT
G = 8.00
1995fa
LT1995
APPLICATIO S I FOR ATIO
8 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V A = 0.875 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V A = 0.800 REF 5 6 VOUT 7 REF 5 6 VOUT VIN 7
*
VIN
9 10 1 2 3
*
8
*
9 10 1 2 3
*
VIN
VIN
8
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V A = 0.667 REF 5 6 VOUT 7
*
9 10 1
*
VIN
VIN
2 3
*CONFIGURE M INPUTS FOR DESIRED G PARAMETER, REFER TO FIGURE 2 FOR CONNECTIONS
Figure 3. Noninverting Amplifier Input Attenuation Configurations (A > 0.5)
NONINVERTING GAIN
additional output offset. The IOS of the internal op amp is typically 120nA and is prepackage tested to a limit of 350nA. The Electrical Characteristics table includes the effects of IB and IOS. AC-Coupling Methods for Single Supply Operation The LT1995 can be used in many single-supply applications using AC-coupling without additional biasing circuitry. AC-coupling the LT1995 in a difference amplifier configuration (as in Figure 1) is a simple matter of adding coupling capacitors to each input and the output as shown in the example of Figure 5. The input voltage VBIAS applied to the
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8 9 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V A = 0.857 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V A = 0.750 REF 5 6 VOUT 7 REF 5 6 VOUT 7 8 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V A = 0.833 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V A = 0.714 REF 5 6 VOUT 7 REF 5 6 VOUT 7
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*
VIN
9 10 1 2 3
8 9 10 1 2 3
8
*
VIN
9 10 1 2 3
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V A = 0.625 REF 5 6 VOUT 7
8
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V A = 0.571 REF 5 6 VOUT
1995 F03
*
9 10 1 2 3
7
VIN
8 7 6 5 4 3 2 1 1 GAIN COMBINATION
1995 F04
73
Figure 4. Unique Noninverting Gain Configurations
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LT1995
APPLICATIO S I FOR ATIO
REF pin establishes the quiescent voltage on the input and output pins. The VBIAS signal should have a low source impedance to avoid degrading the CMRR (0.5 for 1dB CMRR change typically). Using the LT1995 as an AC-coupled inverting gain stage, the REF pin and the relevant P inputs may all be driven from a VBIAS source as depicted in the example of Figure 6, thus establishing the quiescent voltage on the input and output pins. The VBIAS signal will only have to source the bias current (IB) of the noninverting input of the internal op amp (0.6A typically), so a high VBIAS source impedance (RS) will cause the quiescent level of the amplifier output to
8 CIN VIN- CIN VIN+ VBIAS 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4
1995 F05
7 COUT 6 REF 5 VOUT VIN-
Figure 5. AC-Coupled Difference Amplifier General Configuation (G = 5 Example)
+V +V
8
*
9 10 1
M4 M2 M1
7 COUT LT1995 6 REF 5 4 VOUT
*
VIN CIN
2 3
P1 P2 P4
VIN CIN
A = 0.750
*CONFIGURE M INPUTS FOR DESIRED G PARAMETER, REFER TO FIGURE 2 FOR CONNECTIONS. ANY M INPUTS SHOWN GROUNDED IN FIGURE 2 SHOULD INSTEAD BE CAPACITIVELY COUPLED TO GROUND
Figure 7. AC-Coupled Noninverting Amplifier Input Attenuation Configurations (Supply Splitting)
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deviate from the intended VBIAS level by IB * RS. In operation as a noninverting gain stage, the P and REF inputs may be configured as a "supply splitter," thereby providing a convenient mid-supply operating point. Figure 7 illustrates the three attenuation configurations that generate 50% mid-supply biasing levels with no external components aside from the desired coupling capacitors. As with the DC-coupled input attenuation ratios, A, a compound output function including the feedback gain parameter G is given by: VOUT = A * G * VIN
8 CIN 9 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4
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7 COUT 6 REF 5 VOUT
VBIAS
Figure 6. AC-Coupled Inverting Gain Amplifier General Configuration (G = 5 Example)
+V
8 9 10 1 2 3
M4 M2 M1
8 7 COUT LT1995 6 REF 5 4 VOUT VIN CIN
*
9 10 1 2 3
M4 M2 M1
7 COUT LT1995 6 REF 5 4
1995 F07
P1 P2 P4
P1 P2 P4
VOUT
A = 0.667
A = 0.500
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LT1995
APPLICATIO S I FOR ATIO
If one of the A parameter configurations in Figure 3 is preferred, or the use of an external biasing source is desired, the P and REF input connections shown grounded in a Figure 3 circuit may be instead driven by a VBIAS voltage to establish a quiescent operating point for the input and output pins. The VIN connections of the Figure 3 circuit are then driven via a coupling capacitor. Any grounded M inputs for the desired G configuration (refer to Figure 2) must be individually or collectively AC-coupled to ground. Figure 8 illustrates a complete example circuit of an externally biased AC-coupled noninverting amplifier. The VBIAS source impedance should be low (a few ohms) to avoid degrading the inherent accuracy of the LT1995. 0.013% of additional Gain Error for each ohm of resistance on the REF pin is typical.
8 CBYP 9 10 1 CIN VIN VBIAS 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 REF 5 6 7 COUT VOUT
CONFIGURATION EXAMPLE: A = 0.625 G = 6.00 (VOUT/VIN = 3.75V)
1995 F08
Figure 8. AC-Coupled Noninverting Amplifier with External Bias Source (Example)
Resistor Considerations The resistors in the LT1995 are very well matched, low temperature coefficient thin film based elements. Although their absolute tolerance is fairly wide (typically 5% but 25% worst case), the resistor matching is to within 0.2%
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at room temperature, and to within 0.3% over temperature. The temperature coefficient of the resistors is typically -30ppm/C. The resistors have been sized to accommodate 15V across each resistor, or in terms of power, 225mW in the 1k resistors, 113mW in the 2k resistors, and 56mW in the 4k resistors. Power Supply Considerations As with any high speed amplifier, the LT1995 printed circuit layout should utilize good power supply decoupling practices. Good decoupling will typically consist of one or more capacitors employing the shortest practical interconnection traces and direct vias to a ground plane. This practice minimizes inductance at the supply pins so the impedance is low at the operating frequencies of the part, thereby suppressing feedback or crosstalk artifacts that might otherwise lead to extended settling times, frequency response anomalies, or even oscillation. For high speed parts like the LT1995, 10nF ceramics are suitable close-in bypass capacitors, and if high currents are being delivered to a load, additional 4.7F capacitors in parallel can help minimize induced power supply transients. Because unused input pins are connected via resistors to the input of the op amp, excessive capacitances on these pins will degrade the rise time, slew rate, and step response of the output. Therefore, these pins should not be connected to large traces which would add capacitance when not in use. Since the LT1995 has a wide operating supply voltage range, it is possible to place the part in situations of relatively high power dissipation that may cause excessive die temperatures to develop. Maximum junction temperature (TJ) is calculated from the ambient temperature (TA)
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LT1995
APPLICATIO S I FOR ATIO
TJ = TA + (PD * JA)
and power dissipation (PD) as follows for a nominal PCB layout: For example, in order to maintain a maximum junction temperature of 150C at 85C ambient in an MS10 package, the power must be limited to 0.4W. It is important to note that when operating at 15V supplies, the quiescent current alone will typically account for 0.24W, so careful thermal management may be required if high load currents and high supply voltages are involved. By additional copper area contact to the supply pins or effective thermal coupling to extended ground plane(s), the thermal impedance can be reduced to 130C/W in the MS10 package. A substantial reduction in thermal impedance of the DD10 package down to about 50C/W can be achieved by connecting the Exposed Pad on the bottom of the package to a large PC board metal area which is either opencircuited or connected to VS-.
8 9 10 1 2 3
+V M4 M2 M1 LT1995 P1 P2 P4 4 -V REF 5 6 VOUT 10nF 47 7
VIN CONFIGURATION EXAMPLE: G = 1.14
1995 F09
Figure 9. Optional Frequency Compensation Network for (1 G 2)
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Frequency Compensation The LT1995 comfortably drives heavy resistive loads such as back-terminated cables and provides nicely damped responses for all gain configurations when doing so. Small capacitances are included in the on-chip resistor network to optimize bandwidth in the basic difference gain configurations of Figure 1. For the noninverting configurations of Figure 2, where the gain parameter G is 2 or less, significant overshoot can occur when driving light loads. For these low gain cases, providing an RC output network as shown in Figure 9 to create an artificial load at high frequency will assure good damping behavior.
Figure 10. Step Response of Circuit in Figure 9
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LT1995
PACKAGE DESCRIPTIO
0.889 0.127 (.035 .005)
5.23 (.206) MIN
3.20 - 3.45 (.126 - .136)
GAUGE PLANE
0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT
SEATING PLANE NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3.50 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN 1 TOP MARK (SEE NOTE 6)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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MS Package 10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
3.00 0.102 (.118 .004) (NOTE 3) 10 9 8 7 6 DETAIL "A" 0 - 6 TYP 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4) 0.497 0.076 (.0196 .003) REF 0.254 (.010) 0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) 1.10 (.043) MAX 0.86 (.034) REF 12345 0.17 - 0.27 (.007 - .011) TYP 0.50 (.0197) BSC 0.127 0.076 (.005 .003)
MSOP (MS) 0603
DD Package 10-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1699)
R = 0.115 TYP 6 0.675 0.05 0.38 0.10 10
3.00 0.10 (4 SIDES)
1.65 0.10 (2 SIDES)
(DD10) DFN 1103
5 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES)
1 0.25 0.05 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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LT1995
TYPICAL APPLICATIO S
High Input Impedance Precision Gain of 2 Configuration
3V
8 9 10 1 2 3 +V M4 M2 M1 LT1995 P1 P2 P4 4 -V VIN REF 5 6 VOUT 7
1995 TA02
0A to 2A Current Source
15V
-15V VIN IRF9530
-15V
100
-15V
1995 TA04
10nF IOUT
IOUT =
VIN 5 * RS
Single Supply Video Line Driver
5V
+
47F
8 9 10 1 47F 2 3
M4 M2 M1
7 6 5 4 75 220F 10k VOUT f-3dB = 27MHz RL = 75
P1 P2 P4
VIN
+
LT1995
1995 TA06
RELATED PARTS
PART NUMBER LT1363 LT1990 LT1991 LTC1992 LTC6910-x DESCRIPTION 70MHz, 1000V/s Op Amp High Voltage Difference Amplifier Precision Gain Selectable Amplifier Fully Differential Amplifier Programmable Gain Amplifiers COMMENTS 50ns Settling Time to 0.1%, CLOAD Stable 250V Common Mode Voltage, Micropower, Pin Selectable G = 1, 10 Micropower, Precision, Pin Selectable G = -13 to 14 Differential Input and Output, Rail-to-Rail Output, IS = 1.2mA, CLOAD Stable to 10,000pF, Adjustable Common Mode Voltage 3 Gain Configurations, Rail-to-Rail Input and Output
1995fa LT/TP 0105 1K REV A * PRINTED IN THE USA
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2004
-
+
P1 P4
REF
LT1880
REF SENSE OUTPUT 100mV/A
+
-
RS 0.2
M4 M1 LT1995 G=5
1k
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Tracking Negative Reference
LT1790-1.25
1.25V
1F
IIN = 600nA
M1 LT1995 G = -1 P1
-1.25V REF
1995 TA03
-3V
Current Sense with Alarm
15V TO -15V I
15V 10nF
15V
LT6700-3 P1 0.1 LT1995 G=1 M1 10k 10k
FLAG OUTPUT 4A LIMIT
400mV
1995 TA05
+

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